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| VNQ810-E QUAD CHANNEL HIGH SIDE DRIVER Table 1. General Features Type VNQ810-E (*) Per each channel Figure 1. Package Iout 3.5A (*) RDS(on) 160m (*) VCC 36V CMOS COMPATIBLE INPUTS OPEN DRAIN STATUS OUTPUTS s ON STATE OPEN LOAD DETECTION s OFF STATE OPEN LOAD DETECTION s SHORTED LOAD PROTECTION s UNDERVOLTAGE AND OVERVOLTAGE SHUTDOWN s PROTECTION AGAINST LOSS OF GROUND s VERY LOW STAND-BY CURRENT s s SO-28 (DOUBLE ISLAND) REVERSE BATTERY PROTECTION (**) s IN COMPLIANCE WITH THE 2002/95/EC EUROPEAN DIRECTIVE s DESCRIPTION The VNQ810-E is a quad HSD formed by assembling two VND810-E chips in the same SO28 package. The VNQ810-E is a monolithic device made by using STMicroelectronics VIPower M0-3 Technology, intended for driving any kind of load with one side connected to ground. Active V CC pin voltage clamp protects the device against low energy spikes (see ISO7637 transient compatibility table). Active current limitation combined with thermal shutdown and automatic restart protects the device against overload. The device detects open load condition both in on and off state. Output shorted to VCC is detected in the off state. Device automatically turns off in case of ground pin disconnection. Table 2. Order Codes Package Tube VNQ810-E Tape and Reel VNQ810TR-E SO-28 Note: (**) See application schematic at page 9 Rev. 1 October 2004 1/20 VNQ810-E Figure 2. Block Diagram VCC VCC CLAMP OVERVOLTAGE UNDERVOLTAGE GND INPUT1 STATUS1 CLAMP 1 OUTPUT1 DRIVER 1 CLAMP 2 CURRENT LIMITER 1 OVERTEMP. 1 LOGIC OPENLOAD ON 1 CURRENT LIMITER 2 DRIVER 2 OUTPUT2 INPUT2 OPENLOAD OFF 1 STATUS2 OPENLOAD OFF 2 OVERTEMP. 2 OPENLOAD ON 2 Table 3. Absolute Maximum Ratings Symbol VCC Parameter Value Unit DC Supply Voltage Reverse DC Supply Voltage DC Reverse Ground Pin Current DC Output Current Reverse DC Output Current DC Input Current DC Status Current Electrostatic Discharge R=1.5K; C=100pF) - INPUT (Human Body Model: 41 - 0.3 - 200 Internally Limited -6 +/- 10 +/- 10 V V mA A A mA mA - VCC - Ignd IOUT - IOUT IIN ISTAT 4000 4000 5000 5000 V V V V VESD - STATUS - OUTPUT - VCC Maximum Switching Energy EMAX Ptot Tj Tstg (L=1.38mH; RL=0; Vbat=13.5V; Tjstart=150C; IL=5A) Power dissipation (per island) at Tlead=25C Junction Operating Temperature Storage Temperature 23 6.25 Internally Limited - 55 to 150 mJ W C C 2/20 VNQ810-E Figure 3. Configuration Diagram (Top View) & Suggested Connections for Unused and N.C. Pins VCC1,2 GND 1,2 INPUT1 STATUS1 STATUS2 INPUT2 VCC1,2 VCC3,4 GND 3,4 INPUT3 STATUS3 STATUS4 INPUT4 VCC3,4 14 15 1 28 VCC1,2 OUTPUT1 OUTPUT1 OUTPUT1 OUTPUT2 OUTPUT2 OUTPUT2 OUTPUT3 OUTPUT3 OUTPUT3 OUTPUT4 OUTPUT4 OUTPUT4 VCC3,4 Connection / Pin Status Floating X To Ground N.C. X X Output X Input X Through 10K resistor Figure 4. Current and Voltage Conventions IS3,4 VCC3,4 IIN1 VIN1 VSTAT1 VIN2 VSTAT2 VIN3 VSTAT3 ISTAT1 IIN2 ISTAT2 IIN3 ISTAT3 IIN4 INPUT1 STATUS1 INPUT2 STATUS2 INPUT3 STATUS3 INPUT4 STATUS4 GND3,4 IGND3,4 OUTPUT3 IOUT4 OUTPUT4 GND1,2 IGND1,2 VOUT4 VOUT3 OUTPUT2 IOUT3 VOUT2 OUTPUT1 IOUT2 IOUT1 VOUT1 VCC3,4 VCC1,2 IS1,2 VF1 (*) VCC1,2 VIN4 ISTAT4 VSTAT4 (*) VFn = VCCn - VOUTn during reverse battery condition Table 4. Thermal Data (Per island) Symbol Rthj-lead Rthj-amb Rthj-amb Parameter Thermal Resistance Junction-lead per chip Thermal resistance Junction-ambient (one chip ON) Thermal resistance Junction-ambient (two chips ON) 60 (1) 46 (1) Value 20 44 (2) 31 (2) Unit C/W C/W C/W Note: 1. When mounted on a standard single-sided FR-4 board with 0.5cm2 of Cu (at least 35m thick) connected to all VCC pins.Horizontal mounting and no artificial air flow Note: 2. When mounted on a standard single-sided FR-4 board with 6cm 2 of Cu (at least 35m thick) connected to all VCC pins.Horizontal mounting and no artificial air flow 3/20 VNQ810-E ELECTRICAL CHARACTERISTICS (8V Operating Supply Voltage Undervoltage Shut-down Overvoltage Shut-down On State Resistance IOUT=1A; Tj=25C IOUT=1A; VCC>8V Off State; VCC=13V; VIN=VOUT=0V Off State; VCC=13V; VIN=VOUT=0V; Tj =25C On State; VCC=13V; VIN=5V; IOUT=0A 5.5 3 36 13 4 36 5.5 V V V VUSD (**) VOV (**) RON 160 320 12 12 5 0 -75 40 25 7 50 0 5 3 m m A A mA A A A A IS (**) Supply Current IL(off1) IL(off2) IL(off3) IL(off4) Off State Output Current Off State Output Current Off State Output Current Off State Output Current VIN=VOUT=0V VIN=0V; VOUT =3.5V VIN=VOUT=0V; VCC=13V; Tj =125C VIN=VOUT=0V; VCC=13V; Tj =25C Note: (**) Per island Table 6. Protection (Per each channel) (See note 1) Symbol TTSD Parameter Test Conditions Min. Typ. Max. Unit Shut-down Temperature Reset Temperature Thermal Hysteresis Status Delay in Overload Conditions Current limitation Turn-off Output Clamp Voltage 150 135 7 175 200 C C TR Thyst tsdl Ilim VDEMAG 15 20 C s A A V Tj>TTSD 3.5 5.5V Note: 1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related diagnostic signals must be used together with a proper software strategy. If the device is subjected to abnormal conditions, this software must limit the duration and number of activation cycles Table 7. VCC - Output Diode Symbol VF Parameter Forward on Voltage Test Conditions -IOUT=0.5A; Tj=150C Min Typ Max 0.6 Unit V 4/20 VNQ810-E ELECTRICAL CHARACTERISTICS (continued) Table 8. Status Pin (Per each channel) Symbol Parameter Test Conditions VSTAT Status Low Output Voltage ISTAT =1.6mA ILSTAT Status Leakage Current Normal Operation; VSTAT=5V Status Pin Input Normal Operation; VSTAT=5V CSTAT Capacitance ISTAT =1mA VSCL Status Clamp Voltage ISTAT =-1mA Min Typ Max 0.5 10 100 6 6.8 -0.7 8 Unit V A pF V V Table 9. Switching (Per each channel) (VCC=13V) Symbol td(on) td(off) Parameter Turn-on Delay Time Turn-off Delay Time Test Conditions RL=13 from VIN rising edge to VOUT =1.3V RL=13 from VIN falling edge to VOUT =11.7V RL=13 from VOUT =1.3V to VOUT =10.4V Min Typ 30 30 See relative diagram See relative diagram Max Unit s s V/s dVOUT /dt(on) Turn-on Voltage Slope dVOUT /dt(off) Turn-off Voltage Slope RL=13 from VOUT =11.7V to VOUT =1.3V V/s Table 10. Openload Detection Symbol IOL tDOL(on) VOL tDOL(off) Parameter Openload ON State Detection Threshold Openload ON State Detection Delay Openload OFF State Voltage Detection Threshold Openload Detection Delay at Turn Off Test Conditions VIN=5V IOUT=0A VIN=0V 1.5 2.5 Min 20 Typ 40 Max 80 200 Unit mA s V s 3.5 1000 Table 11. Logic Input (Per each channel) Symbol VIL IIL VIH IIH VI(hyst) VICL Parameter Test Conditions Input Low Level Low Level Input Current VIN=1.25V Input High Level High Level Input Current VIN=3.25V Input Hysteresis Voltage IIN=1mA Input Clamp Voltage IIN=-1mA Min 1 3.25 10 0.5 6 6.8 -0.7 8 Typ Max 1.25 Unit V A V A V V V 5/20 VNQ810-E Table 12. Truth Table CONDITIONS Normal Operation INPUT L H L H H L H L H L H L H L H OUTPUT L H L X X L L L L L L H H L H SENSE H H H (Tj < TTSD) H (Tj > TTSD) L H L X X H H L H H L Current Limitation Overtemperature Undervoltage Overvoltage Output Voltage > VOL Output Current < IOL Figure 5. OPEN LOAD STATUS TIMING (with external pull-up) OVER TEMP STATUS TIMING VOUT > VOL VINn IOUT < IOL Tj > TTSD VINn VSTATn VSTATn tSDL tDOL(off) tDOL(on) tSDL 6/20 VNQ810-E Figure 6. Switching time Waveforms VOUTn 90% 80% dVOUT/dt(on) dVOUT/dt(off) 10% t VINn td(on) td(off) t Table 13. Electrical Transient Requirements On VCC Pin ISO T/R 7637/1 Test Pulse 1 2 3a 3b 4 5 ISO T/R 7637/1 Test Pulse 1 2 3a 3b 4 5 CLASS C E I -25 V +25 V -25 V +25 V -4 V +26.5 V II -50 V +50 V -50 V +50 V -5 V +46.5 V TEST LEVELS III -75 V +75 V -100 V +75 V -6 V +66.5 V TEST LEVELS RESULTS II III C C C C C C C C C C E E IV -100 V +100 V -150 V +100 V -7 V +86.5 V Delays and Impedance 2 ms 10 0.2 ms 10 0.1 s 50 0.1 s 50 100 ms, 0.01 400 ms, 2 I C C C C C C IV C C C C C E CONTENTS All functions of the device are performed as designed after exposure to disturbance. One or more functions of the device is not performed as designed after exposure and cannot be returned to proper operation without replacing the device. 7/20 VNQ810-E Figure 7. Waveforms NORMAL OPERATION INPUTn OUTPUT VOLTAGEn STATUSn UNDERVOLTAGE VCC VUSD INPUTn OUTPUT VOLTAGEn STATUSn undefined OVERVOLTAGE VCC VVOUT >VOL OUT>V OL OPEN LOAD without external pull-up INPUTn OUTPUT VOLTAGEn STATUSn OVERTEMPERATURE Tj INPUTn OUTPUT CURRENTn STATUSn TTSD TR 8/20 VNQ810-E Figure 8. Application Schematic +5V +5V +5V VCC1,2 Rprot STATUS1 VCC3,4 Rprot INPUT1 Dld Rprot STATUS2 OUTPUT1 Rprot C INPUT2 Rprot STATUS3 OUTPUT2 Rprot OUTPUT3 INPUT3 Rprot STATUS4 OUTPUT4 INPUT4 GND1,2 GND3,4 Rprot RGND +5V +5V VGND DGND Note: Channels 3 & 4 have the same internal circuit as channel 1 & 2. GND PROTECTION REVERSE BATTERY NETWORK AGAINST Solution 1: Resistor in the ground line (RGND only). This can be used with any type of load. The following is an indication on how to dimension the RGND resistor. 1) RGND 600mV / 2(IS(on)max). 2) RGND (-VCC) / (-IGND) where -IGND is the DC reverse ground pin current and can be found in the absolute maximum rating section of the of the device's datasheet. Power Dissipation in RGND (when VCC<0: during reverse battery situations) is: PD= (-VCC)2/RGND This resistor can be shared amongst several different HSD. Please note that the value of this resistor should be calculated with formula (1) where IS(on)max becomes the sum of the maximum on-state currents of the different devices. Please note that if the microprocessor ground is not common with the device ground then the RGND will produce a shift (IS(on)max * RGND) in the input thresholds and the status output values. This shift will vary depending on many devices are ON in the case of several high side drivers sharing the same RGND. If the calculated power dissipation leads to a large resistor or several devices have to share the same resistor then the ST suggest to utilize Solution 2 . 9/20 VNQ810-E Solution 2: A diode (DGND) in the ground line. A resistor (RGND=1k) should be inserted in parallel to DGND if the device will be driving an inductive load. This small signal diode can be safely shared amongst several different HSD. Also in this case, the presence of the ground network will produce a shift (j600mV) in the input threshold and the status output values if the microprocessor ground is not common with the device ground. This shift will not vary if more than one HSD shares the same diode/resistor network. Series resistor in INPUT and STATUS lines are also required to prevent that, during battery voltage transient, the current exceeds the Absolute Maximum Rating. Safest configuration for unused INPUT and STATUS pin is to leave them unconnected. For VCCpeak= - 100V and Ilatchup 20mA; VOHC 4.5V 5k Rprot 65k. Recommended Rprot value is 10k. OPEN LOAD DETECTION IN OFF STATE Off state open load detection requires an external pull-up resistor (RPU) connected between OUTPUT pin and a positive supply voltage (VPU) like the +5V line used to supply the microprocessor. The external resistor has to be selected according to the following requirements: 1) no false open load indication when load is connected: in this case we have to avoid VOUT to be higher than VOlmin; this results in the following condition VOUT=(VPU/(RL+RPU))RL Dld is necessary (Voltage Transient Suppressor) if the load dump peak voltage exceeds VCC max DC rating. The same applies if the device will be subject to transients on the VCC line that are greater than the ones shown in the ISO T/R 7637/1 table. .C I/Os PROTECTION: If a ground protection network is used and negative transient are present on the VCC line, the control pins will be pulled negative. ST suggests to insert a resistor (Rprot) in line to prevent the C I/Os pins to latch-up. The value of these resistors is a compromise between the leakage current of C and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of C I/Os. -VCCpeak/Ilatchup Rprot (VOHC-VIH-VGND) / IIHmax Calculation example: Figure 9. Open Load detection in off state V batt. VPU VCC RPU INPUT DRIVER + LOGIC OUT + R STATUS VOL RL IL(off2) GROUND 10/20 VNQ810-E Figure 10. Off State Output Current IL(off1) (uA) 1.6 1.44 1.28 1.12 0.96 0.8 0.64 0.48 0.32 0.16 0 -50 -25 0 25 50 75 100 125 150 175 Figure 13. High Level Input Current Iih (uA) 5 Off state Vcc=36V Vin=Vout=0V 4.5 Vin=3.25V 4 3.5 3 2.5 2 1.5 1 0.5 0 -50 -25 0 25 50 75 100 125 150 175 Tc (C) Tc (C) Figure 11. Input Clamp Voltage Vicl (V) 8 7.8 Figure 14. Status Leakage Current Ilstat (uA) 0.05 Iin=1mA 7.6 7.4 7.2 7 6.8 6.6 6.4 6.2 6 -50 -25 0 25 50 75 100 125 150 175 0 -50 -25 0 25 50 75 100 125 150 175 0.01 0.02 0.03 0.04 Vstat=5V Tc (C) Tc (C) Figure 12. Status Low Output Voltage Vstat (V) 0.8 0.7 Figure 15. Status Clamp Voltage Vscl (V) 8 7.8 Istat=1.6mA 0.6 Istat=1mA 7.6 7.4 0.5 0.4 0.3 0.2 7.2 7 6.8 6.6 6.4 0.1 0 -50 -25 0 25 50 75 100 125 150 175 6.2 6 -50 -25 0 25 50 75 100 125 150 175 Tc (C) Tc (C) 11/20 VNQ810-E Figure 16. Overvoltage Shutdown Vov (V) 50 48 46 44 42 40 38 36 34 32 30 -50 -25 0 25 50 75 100 125 150 175 Figure 19. ILIM Vs Tcase Ilim (A) 10 9 Vcc=13V 8 7 6 5 4 3 2 1 0 -50 -25 0 25 50 75 100 125 150 175 Tc (C) Tc (C) Figure 17. Turn-on Voltage Slope dVout/dt(on) (V/ms) 1000 900 800 700 600 500 400 300 200 100 0 -50 -25 0 25 50 75 100 125 150 175 Figure 20. Turn-off Voltage Slope dVout/dt(off) (V/ms) 500 450 Vcc=13V Rl=13Ohm Rl=13Ohm 400 350 300 250 200 150 100 50 0 -50 -25 0 25 50 75 100 125 150 175 Tc (C) Tc (C) Figure 18. On State Resistance Vs Tcase Ron (mOhm) 400 350 300 250 200 150 100 Figure 21. On State Resistance Vs VCC Ron (mOhm) 300 275 Iout=0.5A Iout=0.5A Vcc=8V; 13V & 36V 250 225 200 175 150 125 100 Tc= 150C Tc= 25C 50 0 -50 -25 0 25 50 75 100 125 150 175 Tc= - 40C 75 50 5 10 15 20 25 30 35 40 Tc (C) Vcc (V) 12/20 VNQ810-E Figure 22. Input High Level Vih (V) 3.6 3.4 3.2 3 2.8 2.6 2.4 2.2 2 -50 -25 0 25 50 75 100 125 150 175 Figure 25. Input Low Level Vil (V) 2.6 2.4 2.2 2 1.8 1.6 1.4 1.2 1 -50 -25 0 25 50 75 100 125 150 175 Tc (C) Tc (C) Figure 23. Openload On State Detection Threshold Iol (mA) 60 55 50 45 40 35 30 25 20 15 10 -50 -25 0 25 50 75 100 125 150 175 Figure 26. Openload Off State Detection Threshold Vol (V) 5 4.5 Vcc=13V Vin=5V Vin=0V 4 3.5 3 2.5 2 1.5 1 0.5 0 -50 -25 0 25 50 75 100 125 150 175 Tc (C) Tc (C) Figure 24. Input Hysteresis Voltage Vhyst (V) 1.5 1.4 1.3 1.2 1.1 1 0.9 0.8 0.7 0.6 0.5 -50 -25 0 25 50 75 100 125 150 175 Tc (C) 13/20 VNQ810-E Figure 27. SO-28 (Double Island) Maximum turn off current versus load inductance ILMAX (A) 10 A B C 1 0.01 0.1 1 L(mH) 10 100 A = Single Pulse at TJstart=150C B= Repetitive pulse at T Jstart=100C C= Repetitive Pulse at T Jstart=125C Conditions: VCC=13.5V Values are generated with R L=0 In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves B and C. VIN, IL Demagnetization Demagnetization Demagnetization t 14/20 VNQ810-E SO-28 Double Island Thermal Data Figure 28. SO-28 Double Island PC Board Layout condition of Rth and Zth measurements (PCB FR4 area= 58mm x 58mm, PCB thickness=2mm, Cu thickness=35m, Copper areas: 0.5cm2, 3cm2, 6cm2). Table 14. Thermal Calculation According To The Pcb Heatsink Area Chip 1 ON OFF ON ON Chip 2 OFF ON ON ON Tjchip1 RthA x Pdchip1 + Tamb RthC x Pdchip2 + Tamb RthB x (Pdchip1 + Pdchip2) + Tamb (RthA x Pdchip1) + RthC x Pdchip2 + Tamb Tjchip2 Note RthC x Pdchip1 + Tamb RthA x Pdchip2 + Tamb RthB x (Pdchip1 + Pdchip2) + Tamb Pdchip1=Pdchip2 (RthA x Pdchip2) + RthC x Pdchip1 + Tamb Pdchip1Pdchip2 RthA = Thermal resistance Junction to Ambient with one chip ON RthB = Thermal resistance Junction to Ambient with both chips ON and Pdchip1=Pdchip2 RthC = Mutual thermal resistance Figure 29. Rthj-amb Vs. PCB Copper Area In Open Box Free Air Condition RTHj_am b (C/W) 70 60 50 40 30 20 10 0 1 2 3 4 5 PCB Cu heatsink area (cm ^2)/island 6 7 RthC RthA RthB 15/20 VNQ810-E Figure 30. SO-28 Thermal Impedance Junction Ambient Single Pulse Zth(C/W) 100 0,5 cm ^2/is land 3 cm ^2/is land 6 cm ^2/is land 10 One channel ON Two channels ON on same chip 1 0.1 0.01 0.0001 0.001 0.01 0.1 1 time(s) 10 100 1000 Figure 31. Thermal fitting model of a double channel HSD in SO-28 Tj_1 C1 C2 C3 C4 C5 C6 Pulse calculation formula Z TH = R TH + Z THtp ( 1 - ) where = tp T R1 Pd1 R2 R3 R4 R5 R6 Table 15. Thermal Parameter C13 C14 R13 R14 Tj_2 Pd2 R17 R18 Tj_3 Pd3 C7 C8 C9 C10 C11 C12 R7 R8 R9 R10 R11 R12 Tj_4 C15 C16 R15 Pd4 R16 T_amb Area/island (cm2) R1=R7=R13=R15 (C/W) R2=R8=R14=R16 (C/W) R3=R9 (C/W) R4=R10 (C/W) R5=R11 (C/W) R6=R12 (C/W) C1=C7=C13=C15 (W.s/C) C2=C8=C14=C16 (W.s/C) C3=C9 (W.s/C) C4=C10 (W.s/C) C5=C11 (W.s/C) C6=C12 (W.s/C) R17=R18 (C/W) 0.5 0.05 0.3 3.4 11 15 30 0.001 5.00E-03 1.00E-02 0.2 1.5 5 150 6 13 8 16/20 VNQ810-E PACKAGE MECHANICAL Table 16. SO-28 Mechanical Data Symbol A a1 b b1 C c1 D E e e3 F L S millimeters Min 0.10 0.35 0.23 0.50 45 (typ.) 17.7 10.00 1.27 16.51 7.40 0.40 8 (max.) 7.60 1.27 18.1 10.65 Typ Max 2.65 0.30 0.49 0.32 Figure 32. SO-28 Package Dimensions 17/20 VNQ810-E Figure 33. SO-28 Tube Shipment (No Suffix) Base Q.ty Bulk Q.ty Tube length ( 0.5) A B C ( 0.1) All dimensions are in mm. A C B 28 700 532 3.5 13.8 0.6 Figure 34. Tape And Reel Shipment (Suffix "TR") REEL DIMENSIONS Base Q.ty Bulk Q.ty A (max) B (min) C ( 0.2) F G (+ 2 / -0) N (min) T (max) 1000 1000 330 1.5 13 20.2 16.4 60 22.4 TAPE DIMENSIONS According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb. 1986 Tape width Tape Hole Spacing Component Spacing Hole Diameter Hole Diameter Hole Position Compartment Depth Hole Spacing W P0 ( 0.1) P D ( 0.1/-0) D1 (min) F ( 0.05) K (max) P1 ( 0.1) 16 4 12 1.5 1.5 7.5 6.5 2 End All dimensions are in mm. Start Top cover tape 500mm min Empty components pockets saled with cover tape. User direction of feed 500mm min No components Components No components 18/20 VNQ810-E REVISION HISTORY Date Oct. 2004 Revision 1 - First Issue Description of Changes 19/20 VNQ810-E Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics. 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